darus2013

Circulating Current Control and Evaluation of Carrier
Dispositions in Modular Multilevel Converters
Rosheila Darus
(I)(2)
, Josep POU
(I)(3)
, Georgios Konstantinou
(l)
and Vassilios G. Agelidis
(l)
, Salvador Ceballos
(4)
,
(1)Australian
Energy Research Institute (AERI) & School of Electrical Engineering and Telecommunications
The University of New South Wales, UNSW Sydney, NSW 2052, Australia.
(2)Faculty of Electrical Engineering, Universiti Teknologi Mara (UiTM), 40450 Shah Alam, Selangor, Malaysia.
(3) Terrassa Industrial Electronics Group (TTEG) & Department of Electronic Engineering
Technical University of Catalonia, Catalonia, Spain.
(4) TECNALIA, Energy Unit, Basque Country, Spain.
Email: [email protected]
Abstract-This
paper
presents
two
opposition disposition (POD), alternating phase oppositlon
disposition (APOD) and phase-shifted (PS) PWM. An analysis
of multi-carrier techniques has been made in [12] and it shows
that using level-shifted (LS) PWM the total harmonic distortion
(THD) in the line current is higher compared to PS-PWM and
saw-tooth rotation methods. PD-PWM is applied to a back-to­
back connected HYDC system in [13] where voltage balancing
for the MMC capacitors is achieved under steady state and
dynamic conditions. Reference [14] evaluates different CB­
PWM techniques but the study does not include APOD-PWM
because the authors claim that APOD-PWM and PS-PWM
have the same switching instants. In [14] the performance of
the MMC using CB-PWM is evaluated based on the effects
produced in the capacitor voltage ripples and the results show
that PS-PWM produces the lowest amplitudes.
control techniques to
minimize the circulating currents of the modular multilevel
converter. The control techniques reduce the amplitude of each
capacitor voltage ripple. Multicarrier level-shifted pulse-width­
modulation is applied and the performance of interleaving and
non-interleaving the carrier waveforms between the upper and
the lower arms is reported. The total harmonic distortion of the
output common voltage and rms value of the arms currents are
benchmarked against the case when such techniques are not
employed. The techniques have been verified by simulation using
MATLAB/Simulink and PLECS Blockset software. Experimental
results from a low power phase-leg prototype built with five sub­
modules per arm are also provided.
Index
current
Terms-Modular
control,
Pulse
multilevel
width
converter,
modulation,
Circulating
Capacitor
voltage
balancing.
I.
The MMC contains series of sub-modules (SMs) based on
the half-bridge circuit with a capacitor as a source. For proper
operation of the MMC, the voltages of the SM capacitors have
to be regulated to the reference value. In [13], a voltage
balancing algorithm based on measurements of the capacitor
voltage of each SM and the direction of the arm currents is
applied. The SMs are selected to be connected or disconnected
depending on the direction of the arms currents in order to
charge or discharge the capacitors. Reference [15] proposes a
control to achieve capacitor voltage balance in all the operating
conditions, including steady state and transient condition. A
voltage balancing algorithm based on an open loop control and
estimation of the total energy in the arms is presented in [16]
which results in a reduction of the number of voltage sensors
required. This algorithm is especially attractive for MMC
configurations where a large number of SMs is used.
INTRODUCTION
Multilevel converters are the preferred topologies in high­
voltage (HV) applications due to multiple voltage levels
generated in the quantized line-to-line voltages and the fact that
the power devices have to withstand only a fraction of the total
voltage DC bus voltage [1],[2]. The most common multilevel
topologies are the neutral-point-clamped (NPC), flying
capacitor (FC), and cascade H-bridge (CHB) converters and
their applications in industry are well documented in [3],[4].
The MMC topology was introduced by [5] and offers
various advantages. The MMC topology can be extended to
high number of voltage levels while capacitor voltage
balancing can be achieved relatively easily. Furthermore,
waveforms with low harmonic distortion are generated, fault­
tolerant operation can be implemented, and the dc-link
capacitor can be eliminated [6]. The MMC is already being
used in HV [7] applications such in HYDC transmission
systems [8]. There are also publications proposing the MMC
for medium voltage (MV) applications [9],[10].
The circulating currents of each phase-leg of the MMC
have significant impact on the rating value of the converter
components, the amplitude of the capacitors voltage ripples,
and the power losses [17]-[19]. A proportional resonant (PR)
control is used in a three-phase MMC to remove the ac
component of the circulating currents [20]. The MMC is tested
under unbalanced and fault conditions and the results show
satisfactory performance under both conditions. In [21], the
second-order harmonic in the circulating currents is eliminated
by using a proportional integral (PI) control. The output voltage
and current waveforms show good harmonic performance
Modulation of the MMC can be implemented either at
fundamental or at high switching frequency, as discussed in
[11],[12]. Carrier-based pulse-width-modulation (CB-PWM) is
the most common modulation strategy applied to multilevel
converters including the MMC. CB-PWM has different
configurations such as phase disposition (PD), phase
978-1-4799-0482-2/13/$31.00 ©2013 IEEE
332
A.
under the proposed control technique even when the converter
operates at fundamental switching frequency.
Two independent circuits can be obtained from the study of
each phase-leg of the MMC, i.e common and differential mode
circuits. Fig. 2 shows the equivalent circuits for a single MMC
phase-leg.
Several papers investigate the performance of the MMC
based on multicarrier PWM techniques [12],[14],[22] and
propose strategies to control the circulating current [20],[21].
However, no technical paper has reported so far how
interleaving and non-interleaving multicarrier PWM applied to
the upper and lower arms of a phase-leg and their effect on the
circulating currents and the output voltages when the
circulating current control is activated.
Fig. 2(a) represents the equivalent circuit showing the
voltage applied to the upper extreme of the upper inductor (vup)
and the lower extreme of the lower inductor (Vlow ) with respect
to the midpoint (0) of the dc bus. Using the superposition
theorem, the common voltage (vcom) and the common current
( icom) can be expressed by:
The objective of this paper is to report the performance of
the MMC when circulating current control is applied, and at the
same time observe the effect of interleaving and non­
interleaving LS-PWM on the circulating currents and the
output voltages.
Vcom
=
Vup +v/ow
2
(I)
and
(2)
The rest of the paper is structured as follows. In Section II,
two equivalent circuits of a phase-leg MMC are presented,
namely, the common and the differential mode ones. Two
control techniques for minimizing the circulating currents are
also introduced. In Section Ill, LS-PWM with interleaving and
non-interleaving carriers is applied to the MMC and the output
common voltage and the rms values of the arms currents are
analyzed. Section TV presents selected simulation and
experimental results to verifY the effectiveness of the proposed
techniques. The conclusions are summarized in Section V.
IT.
Circulating Current
where icon! is the output current (ia), as shown in Fig. 2(b). Fig.
2(c) shows the differential circuit of the phase-leg, including
the differential voltage (Vdi/l) and the differential current (idi/l),
the latest being the circulating current. They are expressed by:
(3)
and
(4)
CIRCULATING CURRENT MINIMIZATION
The MMC with N series SMs per arm is shown in Fig.l.
Each SM consists of a half-bridge circuit and a capacitor as a
source. The arms inductors are needed to limit the circulating
currents within the phase-leg and the dc fault current. If not
properly controlled the circulating currents have a significant
impact on the capacitor voltage ripples. The capacitor voltage
ripples can be reduced either by using large size SM capacitors
or by controlling the circulating current. However, using large
size SM capacitors is costly and makes the system bulky.
Therefore, circulating current control is preferred.
L
+�
Vcom ru
o
Va +
---��
i/ow
i
RL
f----=--..l
L
'------JJ' ia
LL
(b)
2
Sub-module
(c)
Fig. 2. (a) Equivalent MMC phase-leg circuit,(b) common mode and (c)
differential mode circuits.
Fig. I. Phase-leg of the MMC with N SMs per arm.
333
based on a proportional action, this error can be tolerated and
satisfactory results can still be achieved. The dynamic
performance of the controller can be further improved by
*
including a second circulating current reference iditf2 obtained
from the voltages of the capacitors. Since there will be N SMs
activated on average in each phase-leg at any switching period,
the average capacitor voltage (VC_avg) is:
The common and differential circuits can be analyzed
separately, which means that the output voltage and current
obtained from the common mode circuit are not affected by
the circulating current and vice versa. Therefore, a differential
voltage vdiffcan be introduced to control the circulating current
without affecting the output voltage and current of the phase­
leg.
There is a dc component in the circulating current that is
needed to keep the phase-leg energized, i.e. maintain the
voltage in the capacitors around their reference value (Vd/N).
An ac component can be included in the circulating current.
Although such component is not essential for the operation of
the MMC, it can help to reduce the capacitor voltage ripple
amplitudes [23]. However, it produces extra losses in the
power devices. The objective of the controllers proposed in
this paper is to remove the ac components of the circulating
current in order to minimize the power losses in the MMC.
B.
N
L Cvc_"P; +Vc_lowJ
i�1
Control Technique 1: Elimination of the ac Component in
the Circulating Current
The ac component of the circulating current can be
separated from the dc component by means of a high-pass filter
(HPF), as it shown in Fig. 3(a). The HPF can be implemented
by using a low-pass filter (LPF) based on a moving average
filter (MAF) [24], as it is shown in Fig. 3(b). A practical
implementation of the MAF is shown in Fig. 3(c), where TIV is
the window width of the MAF, which is adjusted to be lIf, f
being the output frequency. The reference for the controller has
to be zero to eliminate the low-frequency ripples in the
circulating current. The control magnitude of the circulating
current is the differential voltage Vdiff With this control
technique, the dc component of the circulating current is
allowed to circulate but it is not regulated. Therefore, it has to
be adjusted by an external controller, which is typically the one
that regulates the MMC dc-link voltage. Since in the circuit
under analysis shown in Fig.l the dc-link voltage is imposed by
dc sources, no action is required to regulate the dc component
of the circulating current because it happens naturally. On the
other hand, if the whole circulating current was regulated and
not only the ac components, the dynamic performance of the
MMC would improve. This is the target of the following
subsection.
C.
(5)
2N
The voltage reference of each of the SM capacitors is Vd/N;
therefore, VC_avg has to be regulated to this value. According to
this, Vc avg is multiplied by N and compared to Vdc in the control
scheme shown in Fig. 4. A PI controller can be used to adjust
the sum of the voltages of the capacitors to the reference value.
*
*
The addition of the two reference signals, i.e idifll and idifJ2 , are
compared with the actual value of idiff and the control action is
generated through a proportional controller. Although this
technique requires additional measurement and is a little more
complex than Control Technique 1, it provides the MMC with
faster dynamics because the whole circulating current is
controlled and not only the ac components.
(a)
(b)
Fig. 3. Control Technique I: (a) Circulating current. (b) HPF based on a
MAF,and (c) implementation of the MAF.
Control Technique 2: Direct Control of the Circulating
Current
�K'�
In this second control technique, the reference of the
*
circulating current idiff is provided to the controller. Tn order to
minimize the rms value of the circulating current, no low­
frequency ac current component is allowed. Therefore, such a
reference is actually only a dc component, which is calculated
from the actual output power (Pout) of the MMC and the dc-link
voltages, as shown in Fig. 4. The output power is obtained
from the product between ia and Vcom and then filtered by a
MAF to obtain its mean value Pout. Assuming 100% efficiency
of the converter, the power provided from the dc-side has to be
the same as the power in the ac side. Therefore, Pout is divided
*
by Vdc providing idifll . This is a draft reference of the
circulating current and has some error because of the 100%
efficiency assumption. Nevertheless, since the controller is
-
Kl'
idifJ
� I�
sL
Vdiff
Fig. 4. Control Technique 2: Direct control of the circulating current.
334
Ill.
PWM FOR THE MMC
Fig. 6 shows the modulation scheme and the voltage
balancing technique used in this paper. The PWM modules
determine the number of SMs to be activated in the upper and
the lower arms (nup and n/olV, respectively). The sorting
algorithms sort out the SMs in the upper and the lower arms
according to the capacitor voltages, and selects the SMs either
with the highest capacitor voltage or with the lowest capacitor
voltage to be activated or deactivated according to the direction
of the corresponding ann current.
Three different configuration of LS-PWM are applied to the
lower and upper anns of the MMC: (i) PD-PWM, (ii) POD­
PWM, and (iii) APOD-PWM. In PD-PWM all the carriers are
in phase, with POD-PWM the carriers above zero are
alternated by 180°, and with APOD-PWM each carrier is phase
shifted by 180° with respect to the neighboring carriers [25].
The number of carriers needed is the same as the number of
SMs in each arm (N). The common voltage Vcom can produce up
to N+1 or 2N+1 voltage levels, depending on if the interleaving
modulation technique is applied. Interleaving can be achieved
either within the arm or between the arms. Interleaving within
the arm has been investigated in [22] where each SM has a
particular carrier that is phase-shifted with respect to the others.
In this method, all the carriers range in the interval +1 to -1. In
this paper, the interleaving modulation technique has been
applied between the upper and lower anns. Fig. 5 shows the
disposition of the carriers under PD-PWM with and without
interleaving. Assuming the carrier disposition for the upper ann
shown in Fig. 5(a), non-interleaving will be produced if the
same carrier disposition is applied to the lower ann (Fig. 5(b)),
whereas interleaving is achieved using the carrier disposition
shown in Fig. 5(c), where the carriers are phase-shifted 180°
with respect to those in the upper arm.
IV.
A single-phase MMC as shown in Fig. 1, with five SMs per
arm (N=5), has been simulated to validate the proposed control
and modulation techniques. Table I shows the parameters used
in the simulations.
Upper
Vcom
Modulation technique:
+
Vdifl
LS-PWM
+
;:i
-
upper ann earrier waveforms
-I
�
lfillp > 0
VC_up
lfillp < 0
-<
-I'
Select SMs with the highest
(b)
_____ _____
ilmi'
VC_lowN
_____ ______ ___
Ifi10w > 0
Select SMs with the highest
Vc low
Ifilow < 0
.
�
Vc low
(c)
.
tnne
(b)
Lower ann carrier
fonn
- ----- -----wave
----- ---------s (interleaving)
----- ----- ----.
Lower arm
gating signals
Select SMs with the lowest
•
Fig. 6. A single-phase MMC LS-PWM strategy including SM capacitor voltage
balancing for the MMC: (a) modulation technique for the upper and the lower
arm, (b) sorting algorithm for the upper arm and (c) for the lower arm.
TABLE I
•
SPECIFICATION FOR THE SIMULATIONS
Parameter
Dc-link voltage,
SM reference voltage, Vc (V)
SM capacitor, C (mF)
Arm inductors,L (mH)
Carrier frequency,f.oc (kHz)
Number of SMs per arm,N
Load resistor,Rr. (n)
Load inductor,LL (mH)
Modulation index,rna
V;"lkV)
0)
�
�-0.5
-<
Upper arm
gating signals
Sorting algorithm for the lower arm
tnne
(a)
.
nlow
lower
I---....:
�
::..:
arm
Select SMs with the lowest
80.5
0)
-0
..§ 0 -- -- -- -- -- -- - -- -- - -- -- - - - -- ]--0.5
::i
LS-PWM
(lower ann)
Sorting algorithm for the upper arm
0.5
8
0)
-0
.� 0 -- -- -- - -- - -- - -- - --- - -- - -- -- -.
�-0.5 ' v
-<
Modulation technique:
(a)
lt�
________ __________________
N
L-4.{X:1----�
-r:
+
�'x'I----�
e.-=----.J
(upper arm)
V dc
2
The modulation defines the number of SMs in the arms that
have to be activated at any time. Selection of the specific SMs
that are activated or deactivated in the transitions is defmed by
the voltage balancing control, and it depends on the capacitor
voltages and the direction of the arm currents. When the
number of activated SMs increases, the SMs with
lowest/highest voltages will be activated if the current direction
is such that it charges/discharges the capacitors. A similar
reasoning is made for the transitions where the number of
activated SMs in the ann decreases [13].
�
SIMULATION AND EXPERIMENTAL RESULTS
-I UL��'--..::::1....:¥_�Uf....:,l��U!::::lt::st::.�u'--.
--+ .::::1..
time
(e)
Fig. 5. PD-PWM carrier disposition: (a) upper arm, (b) lower arm without
interleaving and (c) lower arm with interleaving.
335
Value
3
600
I
8
5
5
70
5
0.95
Fig. 7(a) and (b) show the differential current obtained by
using Control Technique 1 and 2, respectively. As shown in
this figure, both control techniques can eliminate the ac
component in the circulating current. However, the transient
response produced by these two control techniques is different.
In Control Technique 1, idif/ shows an underdamped response
which contain high frequency oscillations, and the time to
reach steady state is longer. From the simulation studies, idif/
takes around 400ms to reach the steady state value. Tn this
control technique the dc component is not controlled, thus idit!
naturally goes to its steady state value with a slow response.
Nevertheless, the dynamic can be improved if an external
control loop is applied to regulate the dc-link voltage when it is
not imposed by dc sources.
time (s)
Fig.
8. Arm currents (iup & he",.) with non-interleaving PD-PWM.
630
When Control Technique 2 is applied, the simulation
results show that steady state is reached in about 80ms, which
is significantly faster than when Control Technique 1 is
applied. This is because when using Control Technique 2, both
the ac circulating current component and the dc current are
regulated. The trade off, however, is slightly higher
implementation complexity when compared to the Control
Technique 1.
61 5
0.01
Fig. 8 shows a transition of the arm currents when the
circulating current control based on Control Technique 2 is
enabled at t=20ms. The results show that the amplitude of the
arm currents is reduced when the proposed circulating current
control technique is applied. Also, the capacitor voltage ripples
are reduced, as shown in Fig. 9. Fig. 10 presents the simulation
results using PD-PWM with interleaving. It is can be seen that
interleaving increases the ripple in the arm currents. This is
because the voltages applied to the arm inductors from the
upper and lower arms are much different when interleaving is
applied (the number of SMs activated in the phase-leg is still N
on average, but differs from N more often on instantaneous
basis).
0.02
0.03
0.04
time (s)
0.05
0.06
0.07
0.08
Fig. 9. SM capacitor voltages of the phase-leg.
-20
0.03
0
Fig. 10. Arm currents
0.04
time(s)
0.05
0.06
(iap & iloa.) with interleaving PD-PWM.
Differential wrreIll \,d'//J
20
.�
2 r
(kV) O.
-
0.01
0.02
0.03
0.04
time (s)
(a)
0.05
0.06
0.07
1
f-
l ill
IiI
'.
Ir
..,
.
�
�
,-,
0.08
-2 �--�----�--�
o
0.01
0.02
0.Q3
0.04
0.05
0.06
0.Q7
0.08
time (s)
Fig. 11. Common voltage (vearn) . Transition from non-interleaving to
interleaving.
2
(kV)
0.01
0.02
0.03
0.04
time(s)
0.05
0.06
0.07
0.08
0
-1
(b)
Fig. 7. Differential current (idijl). Enabling the circulating current control: (a)
Control Technique I and (b) Control Technique 2.
time (s)
Fig. 12. Output voltage (va) transition from non-interleaving to interleaving.
336
14(a) shows the arm currents; they become sinusoidal when the
controller is activated. This is because idiff is regulated to be
practically continous, as it is shown in Fig. 14(b), and
consequently 50% of the output current circulates in each of
the anns (ij2). Fig. IS shows the effect of the carrier
interleaving on idifland the upper and lower arm currents. It can
be observed that the use of interleaving increases the ripple in
(A) a
idifl:
0.0 1
0.02
0.03
0.04
0.05
0.06
0.07
0.08
time (s)
Fig.13. Output current (ia) transition from non-interleaving to interleaving.
TABLE III
SPECIFTCAnONS OF THE TEST CONVERTER FOR THE EXPERIMENTAL RESULTS
Parameter
Dc-link voltage, Vde (V)
SM voltage, Vc (v)
SM capacitor, CSI! (mF)
Arm inductors,L (mH)
Carrier frequency,fiw (kHz)
Number of SMs per arm,N
Load resistor,Rr. (0)
Load inductor,LL (mH)
TABLE"
RMS VALUES OF THE ARM CURRENTS AND THO OF THE OUTPUT VOLTAGE.
(.) INDICATES INTERLEAVING IS ApPLIED.
LS-PWM
Case
1
PD
POn
Case
2
POD
POOn
APOD
APOOn
Case
3
rms arm currents
(iu, & iz.",.), (A)
T1
T2
No.CC
11.663
8.685
8.681
1l.692
8.708
8.708
11.658
8.680
8.681
1l.689
8.705
8.708
11.663
8.680
8.683
1l.689
8.706
8.708
%THD common voltage
No.CC
19.028
l.622
18.978
l.622
19.030
l.622
(vcom)
T1
18.893
l.558
18.895
l.467
18.910
l.394
T2
18.893
l.558
18.896
l.469
18.911
l.394
Value
250
50
3.6
3.6
5
5
31
5
(A)
\
However, the benefit of using interleaving is the improved
quality of the output voltage and current wavefonns, as shown
in Figs. 11, 12 and 13. The number of voltage levels is
increased from N+ I to 2N+ I when using interleaved carriers as
shown in Fig. 11. Also improved quality of the output voltage
and current are depicted in Figs. 12 and 13 when interleaving is
applied. Although this improvement comes with an increase in
the ann current ripples, it will not significantly impact on the
capacitor voltage ripples because those current ripples are at
high frequency values (carrier frequency).
-5
Current Control Enabled
lr ------+-----�------_r------+
I ------1_----�
0.0
0.1
4
time (s)
(a)
0.3
0.2
2
(A) 0
-2
-4
lr ------+-----�I------_r------------�------�I
0.2
0.3
time (5)
(b)
Fig. 14. Circulating current control: (a) arm currents (iup and i/o,,),and (b)
diflerentia1 and output current ( idU1and ia)
The simulation results for all of the cases are summarized
in Table IT. The results are divided into three cases; Case I,
Case 2 and Case 3, using PD-PWM, POD-PWM and APOD­
PWM, respectively. The modulation index for the simulation is
ma=0.95 with five SMs per arm for all of the cases. Both, non­
interleaving and interleaving are tested. The total hannonic
distortion (THD) of the common output voltage and the nns of
the arms currents are measured when there is no circulating
current control (No.CC), and with circulating current control
using Control Technique 1 (Tl) and Control Technique 2 (T2).
As expected, removing the ac component in the circulating
current can reduce the rms value of the arm currents, while the
application of interleaving increases it. On the other hand, the
THD values of the output voltage improve significantly if
interleaving is employed. The use of the proposed circulating
current control does not deteriorate the output voltage quality.
The results show that there are no significant changes in the
rms arm currents and the output voltage THD when using
different carrier dispositions.
0.0
0.1
0.1
4
time (s)
(a)
2
(A) 0
-2
The proposed techniques are verified through experimental
results from a single-phase laboratory prototype [26]. The
parameters of the prototype are shown is Table Ill. Fig. 14
shows the transition from operating with open loop to
controling the circulating current by Control Technique 2. Fig.
-4
0.0
0.1
\
I
Carrier Interleaving Disabled
I
I
0.2
OJ
time (s)
(b)
Fig. 15. Transition from interleaving to non-interleaving: (a) arm currents
(iup and i/ow),and (b) differential and output current (i,wrand ia)
337
V.
[10]
CONCLUSION
This paper proposes two control techniques for minimizing
the circulating currents of the MMC. Both control techniques
can eliminate the ac components of the circulating currents
and therefore the power losses of the MMC are also
minimized. Furthermore, muIticarrier PWM is studied using
different carrier dispositions (PD, POD and APOD), including
the application of interleaving between the upper and lower
arms of a phase-leg. The interleaving technique improves the
quality of the output voltage and current but increases the rms
value of the circulating currents. The different carrier
dispositions produce similar results in all of the cases
analysed.
[II]
[12]
[13]
[14]
A CKNOWLEDGMENT
[15]
This work has been developed under the RURALGRlD
project in the CTP frame with support of the Secretaria
d'Universitats i Recerca of the Department d'Economia i
Coneixement of the Generalitat de Catalunya, and the
Departmento de Educaci6n, Universidades e Investigaci6n
Direcci6n de Politica Cientifica Proyectos de Investigaci6n of
the Basque Country. It has also been supported by the
Ministerio de Economia y Competitividad of Spain under
project ENE2012-36871-C02-00.
[16]
[17]
[18]
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