2019 21st International Middle East Power Systems Conference (MEPCON), Tanta University, Egypt Cascaded Multilevel Split-Source Inverters: Analysis and Modulation Mahmoud AbdulSalam, Sherif M. Dabour, Essam M. Rashad Power Electronics and Electric Drives (PEED) Research Lab Faculty of Engineering, Tanta University, Tanta, Egypt [email protected], [email protected], [email protected] Abstract—A new cascaded multilevel inverter topology is proposed in this paper. This topology extends the idea of the recently introduced Split-Source Inverter (SSI) to the cascaded Multi-Level Inverter (MLI) configurations. This structure provides the boosting capability in conjunction with the dc to ac conversion in a single unit with reduced passive elements. Therefore, it represents a good alternative of the well-known ZSource MLIs. Two different configurations of the proposed inverter are introduced based on the configuration of each SSI unit. The topological structure, operating principle and modulation techniques for each configuration of the proposed inverter are presented. The validity of the analysis and the performance of the presented topology are investigated via simulation study. Keywords—Cascaded multilevel inverter, Split-source inverter, phase-shift carrier modulation, level-shifted carrier modulation I. INTRODUCTION RID-CONNECTED PV farms have different power converter connections and configurations, centralized, string, and microinverters [1]. Centralized converters market share is lowered by time due to high voltage connections, shading, partial shading, and power devices rating, cost, and size problems. String and microinverters shipment are increased a year by year and expected to reach 9GW by 2021. Microinverters succeeded in the market as modularity, and scalability of the systems is achieved, this leads to easy, and fast maintenance in zero outage time. As the price of PV panels cost is lowered, power converter manufacturers also need to enhance efficiency, reduce the size, and lowering the cost. Performance enhancement of power converter can be achieved by using Sic or Gan devices, but it’s still not preferred as a cost-wise [2]. Multilevel inverters (MLI) are the standard solution of the PV applications if low devices’ ratings are needed [3]. Different technologies are available to use for grid-connected systems [4]. Among the multilevel inverters, the cascaded HBridge topologies has the advantages of modularity. Because it can be constructed from multiple units of single-phase Hbridge modules as shown in Fig. 1. To achieve a module-level monitoring, and control such as MPPT, each PV panel is connected to microinverter that is connected in series with each other to get required system voltage. Microinverter consists of the dc-dc stage called power optimizer (MPPT) and dc-ac stage. In this case, each module of the cascaded MLI is constructed as shown in Fig. 2(a) from front-end boost converter fed H-bridge inverter. On the other hand, each unit could be a single-stage power converter (SSC) such as in Fig. 2(b), which uses a single-phase impedance source inverters (ZSI). The SSC reduces the system cost, size, and enhances G the performance, and efficiency. The ZSI utilizes four passive elements in the impedance network and suffers from [5] discontinues input current, besides using additional switching states. Utilizes four passive elements A modified ZSI that overcomes discontinuity of input current called quasi-ZSI (QZSI) suffers from pulsating inverter bridge dc voltage that arises switches voltage stresses [6]. Another SSC suggested technology is the split-source inverter [7]. The SSI consists of a single inductor and a diode for each inverter leg. It has two different topologies termed in this paper by P-type and N-type as shown in Fig. 2(c) and (d). The SSI offers many advantages compared to other SSC [8] Same number of switches The lowest number of passive elements Continuous supply current and lowered bridge capacitor voltage stress Use the same switching states and modulation techniques of the VSI No special added switching states The SSI has been used as a single-stage two-level inverter and can be extended to multi-level inverters [9], [10]. Splitsource H-bridge (SSHB) is a perfect submodule configuration to be a power conditioning stage between PV panels and load, or grid terminals. Cascaded H-bridge can be built using the aforementioned microinverter as it achieves module-level control. This paper proposes a new cascaded multilevel inverter topology based on split-source H-bridge submodules. The proposed topology improves the performance of the conventional single-stage and multilevel boosting topologies in terms of reducing the number of passive elements in each H-bridge unit. The operating principles and modulation techniques of the proposed inverter are introduced in this paper. Finally, a seven-level topology is selected as a case study to verify the presented analysis via simulation results using Matlab/Simulink. Fig. 1. Schematic diagram of the conventional CHB inverter. 978-1-7281-5289-9/19/$31.00 ©2019 IEEE 1204 Authorized licensed use limited to: University of Gothenburg. Downloaded on July 25,2020 at 19:22:13 UTC from IEEE Xplore. Restrictions apply. (a) front-end two-stage boost H-bridge inverter (b) Quasi-Z Source single-stage H-bridge inverter (c) Split-Source single-stage H-bridge inverter (N-type) (d) Split-Source single-stage H-bridge inverter (P-type) Fig. 2. Configurations of two and single stage boost inverter topologies. II. ANALYSIS OF SPLIT-SOURCE H-BRIDGE INVERTERS The power circuit topology of SS-HB is composed of conventional H-bridge inverter, which is fed from a unique impedance network. The impedance network consists of single inductor, single capacitor, and two diodes, each diode is connected to the midpoint of a leg. Based on the method of connecting the dc-supply to the impedance network, the SSHB inverters are classified into two types as shown in Fig. 3 [11]. The first one is called N-type SS-HB in which the dcsupply is connected between the inductor and the common negative dc-rail of the inverter. The topology is called P-type SS-HB, where the dc-supply is connected between the common positive-dc rail of the inverter and the inductor. Both two types can be used as a submodule to build up the cascaded SSI. To better understand the differences exhibited by the aforementioned types, the following subsections give details about the operation and modulation of both types. A. Modes of Operation 1) N-type: In this type, the negative terminal of the dcsupply is connected to the common negative dc-rail of the inverter, while the positive terminal of the dc-supply is connected to the inductor. In addition, the second terminal of the inductor is connected to the anodes of the diodes, while diode cathodes are connected to the H-bridge midpoints as shown in Fig. 2. (c). On the other hand, the upper and lower switches of each leg in the H-bridge are operated in complementary manner. Therefore, the switches of the Hbrige has four different switching states as shown in Fig. 3(a). state (1,1) is mandatory for boosting operation of the N-type SS-HB inverter. TABLE I. MODES OF OPERATIONS OF SS MLI TOPOLOGIES Switching State (0,0) N-type P-type (0,1) charging Inductor discharging (1,0) (1,1) Inductor discharging Inductor charging 2) P-type: Unlike the N-type of SS-HB inverter, the positive terminal of the dc-supply is connected to the common positive dc-rail of the inverter, while the negative terminal of the dc-supply is connected to the inductor as shown in Fig. 2(d). In addition, the second terminal of the inductor is connected to the common-cathods of the diodes, while their anodes in this case are connected to the H-bridge midpoints as shown in Fig. 2. (d). As a result of this configuration, the parasitic inductance in the commutation path of these diodes is minimized. In this case, the inverter bridge still operates with the same manner of the N-type SS-HB inverter. As a result, the switches of the H-brige has the same four different switching states of the N-type, but with other charging and discharging modes as shown in Fig. 3(b). Faced by the aforementioned switching states, the inductor is charging by turrning ON any of the lower switches. However, the inductor is discharge if both upper switches are operated. The upper part of Table 1 summarize these states and the modes of operation. Consequently, the In this case, the inductor is charging by turrning ON any of the upper switches. However, the inductor is discharge if both lower switches are operated. The lower part of Table 1 summarize these states and the modes of operation. Therefore, the state (0,0) is mandatory for boosting operation of the P-type SS-HB inverter as concluded from Fig. 3(b). 1205 Authorized licensed use limited to: University of Gothenburg. Downloaded on July 25,2020 at 19:22:13 UTC from IEEE Xplore. Restrictions apply. (a) N-type SS-HB modes of operation (a) P-type SS-HB modes of operation Fig. 3. Modes of operation of SS-HB inverters. B. Modulation There are different modulation schemes have been introduced in the literature for MLI. Each of them has different advantages and drawbacks. The Selective Harmonic Elimination (SHE) and stair case modulation are fundamental switching frequency modulation techniques. However, the Space Vector Modulation (SVM) is a medium switching frequency one. Both SHE and SVM are not preferred for MLI as they require a lot of calculations and need some modifications for different number of levels. Most used modulation technique is the Carrier-Based (CB) modulation technique due to simplicity, and their capability to scaled for any number of levels [3]. Generally, there are two basic CB modulation schemes for MLIs [12]. These schemes are 1) Phase-Shifted Multicarrier Modulation and 2) Level-shifted Multicarrier Modulation. In this subsection, the suitability of their applications for the proposed inverter are investigated. 1) Phase-shifted multicarriers modulation scheme: In this scheme, (𝑚ൌ ͳ) times of triangular carriers are required for 𝑚 times of voltage levels, where all carrier waves have the same amplitude and frequency, but with a phase-shift between them. The phase-shift between the carrier, ߶ is 𝑐𝑟 given by ߶𝑐𝑟 ൌ ͵ ͲΤൌ𝑚 ൌ ͳൌ (1) For the sake of example, Fig. 4 shows the generation of the gating pulses for the upper SS-HB inverter unit of phase-𝑎 in a seven-level cascaded SS-MLI using this approach. As can be observed from Fig. 4 that, six triangular carriers shifted by 60 degrees are utilized. Another note is raised here that the both discharging states of the P-type and the N-type of the SSHB inverters are employed in the switching sequence of this modulation scheme. Therefore, the phase-shifted multicarriers modulation scheme is suitable for both P-type and N-type SS MLI topologies. 2) Level-shifted multicarriers modulation scheme: Similar to the phase-shited multicarriers scheme, (𝑚ൌ ͳ) times of triangular carriers are required for 𝑚 levels MLI. Howevre, in this scheme, the carriers are vertically disposed. As an illustration, Fig. 5 shows the gating signals generation using this scheme for seven level MLI, where the six carrierwaves are level shifted with in-phase disposition (IPD). Alternative phase dispositions are also available. According to the waveforms of Fig. 5, a unique discharging state, {0,0} is valid in this modulation scheme. Therefore, the boosting capability is valid in the level-shifted multicarriers scheme for the P-type SS-MLI. 1206 Authorized licensed use limited to: University of Gothenburg. Downloaded on July 25,2020 at 19:22:13 UTC from IEEE Xplore. Restrictions apply. TABLE II. SUITABILITY OF CONVENTIONAL MODULATION SCHEMES FOR THE PROPOSED SS MLI TOPOLOGIES Modulation schemes Phase-shifted multicarriers Level-shifted multicarriers modulation modulation N-type ξ ൌ P-type ξ ξ III. CASCADED SPLIT-SOURCE H-BRIDGE INVERTER A cascaded split-source MLI consists of a series of splitsource H-bridge inverter units, which are described in the aforementioned section. The main function of this topology is to shape the output voltage waveform from several separate dc supplies, which can be obtained photovoltaic panels. For example, the basic structure of a seven-level single-phase cascaded SSI can be obtained by the building block for three SS-HBs, where the output terminals of the different SS-HBs are connected in series. It is important to note that, while discussing the operation of P-type and N-type SS-HB inverters in Section II, a general observation is noted that both topologies need different switching states to discharge the inductor through the capacitor. This operation is necessary for the boosting action. In the P-type SS-MLIs, both modulation strategies (phaseshifted and level-shifted) can be utilized, while in the case of N-type SS-ML only the phase-shifted multicarriers strategy is used. IV. SIMULATION RESULTS Fig. 4. Phase-shifted multicarriers scheme for a seven-level SS-HB inverter Table II summarize the conclusions about the aforementioned discussion about the suitability of the conventional modulation schemes for the proposed SS-MLI topologies. In order to verify the validity of the proposed three-phase cascaded split-source multilevel inverter topologies, three different models using MATLAB/Simulink platform are simulated. The first model for N-type cascaded SS-MLI topology, which is modulated by phase-shifted multicarriers approach, while the other two models for the P-type topology with both phase-shifted and level-shifted modulation schemes. Table III lists the simulation parameters of all models, while the modulation indexes are adjusted to give the same output voltage magnitudes in all schemes. The proposed inverters has been used to supply an inductive load, while the switches and passive components are assumed to be ideal. The two possible configurations with the proposed modulation schemes are tested and the simulation results are shown in Figs. 6 and 7. It can be observed that the boosted output phase voltages produced by the phase-shifted multicarriers modulation scheme are almost identical for both P-type and N-type except the N-type has an increased THD as listed in Table V. However, the voltage produced by the other method is differ in its waveform. TABLE III. SIMULATION PARAMETERS Parameters Supply dc-voltage Desired output voltage Output frequency Switching frequency Modulation index Fig. 5. Level-shifted multicarriers scheme for a seven-level SS-HB inverter Load parameters Values 20V for each SS-HB inverter 220V per phase 50 Hz 1 kHz 0.955 for Phase0.81 for Level-shifted shifted carriers carriers modulation R=100 ohm L= 0.25 H 1207 Authorized licensed use limited to: University of Gothenburg. Downloaded on July 25,2020 at 19:22:13 UTC from IEEE Xplore. Restrictions apply. (a) Output phase-voltage (f) Output phase-voltage (k) Output phase-voltage (b) Output Line-voltage (g) Output Line-voltage (l) Output Line-voltage (c) output currents (h) output currents (m) output currents (d) Capacitor voltages of the cascaded submodules (i) Capacitor voltages of the cascaded submodules (n) Capacitor voltages of the cascaded submodules (e) Inductor currents of the cascaded submodules (j) Inductor currents of the cascaded submodules (o) Inductor currents of the cascaded submodules Fig. 6. Simulation results: (a)-(e) for P-Type cascaded SS-HB MLI using Level-shifted multicarriers, (f)-(j) for P-Type cascaded SS-HB MLI using Phaseshifted multicarriers, and (k)-(o) for N-Type cascaded SS-HB MLI using Phase-shifted multicarriers The line voltage waveforms are also looks like and it contains seven voltage levels due to the application of high modulation index. A summary of the simulation results of the inductor currents and capacitor voltages in a SS-HB inverter unit for both topologies are given in Table IV. It can be obvious from the waveforms and Table IV that, there are significant diversity between the inducer currents and capacitor voltages in the P-type topology with level-shifted carrier modulation. This results in high stresses on the switching devices. However, in the other cases, there are near agreement between the results. V. CONCLUSIONS This paper proposes two different cascaded split-source multilevel inverter topologies, which are termed by P-type and N-type in this study. These topologies has some advantages compared with the conventional cascaded multilevel inverters and the other boosting single-stage inverters. The multicarrier based modulation techniques have also been successfully extended for the proposed topologies. For the P-type topology, 1208 Authorized licensed use limited to: University of Gothenburg. Downloaded on July 25,2020 at 19:22:13 UTC from IEEE Xplore. Restrictions apply. phase-shifted carriers approach is used. The P-type topology has a good performance in terms of the output voltage waveforms quality, switches stresses and the ripples in the capacitor voltage and inductor current using the phase-shifted modulation scheme. REFERENCES D. Varma Tekumalla, D. Pal and P. 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Mattavelli, P. Davari and F. Blaabjerg, “Performance evaluation of the single-phase split-source inverter using an alternative dc–ac configuration,” IEEE Trans. Ind. Electron., vol. 65, no. 1, pp. 363-373, Jan. 2018 [12] P. Palanivel and S.S. Dash, “Analysis of THD and output voltage performance for cascaded multilevel inverter using carrier pulse width modulation techniques,” IET Power Electronics, Volume 4, Issue 8, September 2011, p. 951 – 958 [1] (a) P-type using Level-shifted scheme (THD=13.5%) (b) P-type using Phase-shifted scheme (THD=13.5%) (c) N-type using Phase-shifted scheme (THD=16.8%) Fig. 7. FFT analysis of the output voltage for the proposed inverter topologies and the corresponding modulation schemes. TABLE I. INDUCTOR CURRENTS AND CAPACITOR VOLTAGE SIMULATION RESULTS Parameters Per SS-HB unit Inductor currents Capacitor voltages P-type (Level-shifted) P-type (Phase-shifted) N-type (Phase-shifted) 0.3 A 5.2 A 12.3 A 25 V 95 V 171 V 5.6 A 5.7 A 5.7 A 106 V 107 V 107 V 5.7 A 5.6 A 5.7 A 107 V 106 V 106 V both phase-shifted and level-shifted multicarriers modulation schemes are utilized, while in the N-type topology, only the 1209 Authorized licensed use limited to: University of Gothenburg. Downloaded on July 25,2020 at 19:22:13 UTC from IEEE Xplore. Restrictions apply.