ESE 568: Mixed Signal Design and
Modeling
Basic 2-stage Opamp
Lec 6: September 19th, 2018
Basic 2-stage Opamp (con’t) and Advanced
Opamp Design
Penn ESE 568 Fall 2018 – Khanna adapted from Perrot
CPPSim Lecture notes
Basic 2-Stage Opamp
Basic 2-Stage Opamp
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Key issue: two-stages lead to two poles that are
relatively close to each other
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This leads to very poor phase margin
Inclusion of a compensation capacitor across
the second stage leads to pole splitting such that
stable performance can be achieved
A compensation resistor is also desirable to help eliminate
the impact of a RHP zero that occurs due
to compensation
This is a common “workhorse” opamp for
medium performance applications
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Relatively simple structure with reasonable performance
Penn ESE 568 Fall 2018 - Khanna
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2-Stage Opamp Frequency Response
Penn ESE 568 Fall 2018 - Khanna
Key Specifications of Opamps (Open Loop)
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DC small signal gain
Unity gain frequency
Dominant pole frequency
Parasitic pole frequencies
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2-Stage Opamp Frequency Response
2-Stage Opamp Frequency Response
Unity-gain frequency
g
ω 0 = m1
CC
DC gain
DC gain
Dominant pole
Dominant Pole
Parasitic pole
Parasitic pole
Unity-gain frequency
Penn ESE 568 Fall 2018 - Khanna
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Penn ESE 568 Fall 2018 - Khanna
2-Stage Opamp
Key Specifications of Opamps (Closed Loop)
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Settling Time/Slew Rate
Offset voltage
Settling time (closed loop bandwidth)
Common-Mode Rejection Ratio (CMRR)
Power Supply Rejection Ratio (PSRR)
Equivalent Input-Referred Noise
Penn ESE 568 Fall 2018 - Khanna
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2-Stage Opamp – Slew Rate
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2-Stage Opamp
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Settling Time/Slew Rate
SR ≡
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Penn ESE 568 Fall 2018 - Khanna
dvout
dt
=
max
I CC
max
CC
=
I D5
CC
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2
Finite Slew Rate Effect
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Unity Gain Freq and Slew Rate
Ex. Unity-gain Follower
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Relationship between unity gain frequency and slew
rate:
ω0 =
g m1
CC
SR =
I D5
CC
vI = Asin(ω t)
dvo
dt
= Aω
MAX
Penn ESE 568 Fall 2018 - Khanna
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Unity Gain Freq and Slew Rate
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2-Stage Opamp Offset: Systematic
Relationship between unity gain frequency and slew
rate:
ω0 =
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Penn ESE 568 Fall 2018 - Khanna
g m1
CC
SR =
I D5
CC
For 45° phase margin:
SR =
SR =
I D5
ω
g m1 0
ω 0 = p2
I D5
p2
gm1
p2 ≈ −
gm 7CC
−g
≈ m7
C1C2 + C1CC + CC C2
C2
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2-Stage Opamp Offset: Systematic
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2-Stage Opamp Offset: Random
VOS = ΔVt (1−2)
#g &
+ΔVt (3−4) % m3 (
$ gm1 '
+
Penn ESE 568 Fall 2018 - Khanna
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Penn ESE 568 Fall 2018 - Khanna
#
W
W &
Δ
% −Δ
(
(VGS −Vt )(1−2) %
L(1−2)
L(3−4) (
−
W
W
%
(
2
% L
L(3−4) ('
$ (1−2)
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3
2-Stage Opamp Offset: Random
2-Stage Opamp CMRR
Minimize by making
gm3,4<gm1,2
VOS = ΔVt (1−2)
#g &
+ΔVt (3−4) % m3 (
$ gm1 '
Minimize by operating
input transistors at small
Vgs-Vt
Penn ESE 568 Fall 2018 - Khanna
+
#
W
W &
Δ
% −Δ
(
(VGS −Vt )(1−2) %
L(1−2)
L(3−4) (
−
W (
% W
2
% L
L(3−4) ('
$ (1−2)
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2-Stage Opamp PSRR+
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2-Stage Opamp PSRR+
2-Stage Opamp CMRR
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Penn ESE 568 Fall 2018 - Khanna
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2-Stage Opamp PSRR-
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2-Stage Opamp PSRR-
2-Stage Opamp Noise Analysis
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Each opamp stage will contribute noise
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@ high frequencies M6 looks diode connected
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2-Stage Opamp Noise Analysis
Penn ESE 568 Fall 2018 - Khanna
Shot Noise
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Thermal Noise
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Flicker Noise: 1/F Noise
Typically the spectral density of the noise will be of the same order at
each stage
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Input referral of the noise reveals that the second stage noise
will have much less impact than the first stage noise
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Discrete random event of charge jumping potential
barrier (i.e PN junction)
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Each opamp stage will contribute noise
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Noise Sources
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Typically the spectral density of the noise will be of the same order at
each stage
Random thermal motion of electrons
Usually due to impurities causing traps in material which
capture and emit carriers randomly
Input-referred noise calculations of an opamp need only focus on the
first stage
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MOSFET Noise Model
Penn ESE 568 Fall 2018 - Khanna
MOSFET Noise Model
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Flicker noise as voltage on the gate
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Flicker noise as voltage on the gate
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Thermal noise as current in the channel
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Thermal noise as current in the channel
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Input-referred MOSFET Noise
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Input-referred MOSFET Noise
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Analysis of Opamp Noise (First Stage)
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Analysis of Opamp Noise (First Stage)
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Analysis of Opamp Noise (First Stage)
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Penn ESE 568 Fall 2018 - Khanna
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Analysis of Opamp Noise (First Stage)
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Input-referred Opamp Noise (First Stage)
Penn ESE 568 Fall 2018 - Khanna
Input-referred Opamp Noise (First Stage)
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Opamps Utilized in Wide Range of Applications
Advanced Opamp Topologies
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Each application comes with different opamp
requirements
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Integrated opamps are typically custom designed for their
specific application
Penn ESE 568 Fall 2018 - Khanna
Fully Differential Basic Two Stage Opamp
Single-Ended Vs. Fully Differential Topologies
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Analog circuits are sensitive to noise from the power supply
and other coupling mechanisms
Fully differential topologies can offer rejection of commonmode noise (such as from supplies)
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We can separate this into differential and common mode
circuits, similar to a single-ended differential amplifier
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Differential behavior same as the single-ended opamp
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Common mode setting needs to be dealt with (Vbias)
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Information is encoded as the difference between two signals
More complex implementation than single-ended designs
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Note that we have twice the effective range in input/output swing due to the
differential signaling
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Common-Mode Gain From Input
Common Mode Influence
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Maximum swing for fully differential signals requires
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Can be simplified to common-mode “half-circuit”
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Common-mode output is sensitive to common mode input
Accurate setting of the common mode value
Suppression of common mode noise
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Common-Mode Gain From Input Bias
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Analysis is same as for single-ended design
Penn ESE 568 Fall 2018 - Khanna
Common Mode Feedback Biasing (CMFB)
Common mode “half circuit” can still be used
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Use an auxiliary circuit to accurately set the common mode
output value to a controlled value Vref
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Common-mode output is extremely sensitive to Vbias!
Penn ESE 568 Fall 2018 - Khanna
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Improved CMRR and PSRR across a wide frequency range
Twice the effective signal swing
Disadvantages of fully differential topologies
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Penn ESE 568 Fall 2018 - Khanna
Advantages of fully differential topologies
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Need to be careful not to load the outputs with the common mode
sensing circuit (Rlarge in this case)
Need to design CMFB to be stable
Cascoded Current Source
Single-Ended Versus Fully Differential
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Power and complexity
Most opamp topologies can be modified to support either
single-ended or fully differential signaling
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Cascoded Current Source
Cascode Current Mirror
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Offers increased output resistance
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Cascode Current Mirror
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Reduces small signal dependence of output current on the
output voltage of the current source
We derived:
Output resistance boosted by intrinsic gain of M3,
gm3ro3
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Telescopic Opamp (Fully Differential)
What is Z0?
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Popular for high frequency applications
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Telescopic Opamp Frequency Response
Single stage design
Limitation: input and output swing quite limited
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Telescopic Opamp Frequency Response
DC gain
Dominant pole
Parasitic pole
Unity-gain frequency
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Telescopic Opamp Frequency Response
Penn ESE 568 Fall 2018 - Khanna
Telescopic Opamp Frequency Response
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Telescopic Opamp Frequency Response
Penn ESE 568 Fall 2018 - Khanna
Folded Cascode Opamp
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Modified version of telescopic opamp
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Significantly improved input/output swing
High BW (better than two stage, worse than telescopic)
Only single stage of gain (lower than telescopic)
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Two Stage with Cascoded Output Stage
Folded Cascode Frequency Response
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Higher DC gain than with two stage or folded cascode
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Same output swing as folded cascode
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Two gain stages with boosted gain on the output stage
Lower than for basic two stage
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Two Stage with Cascoded Input Stage
Two Stage with Cascoded Output Stage –Frequency Response
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Compared to two stage with cascoded output
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Similar DC gain
Improved output swing
Reduced input swing
Penn ESE 568 Fall 2018 - Khanna
Big Ideas
Two Stage with Cascoded Input Stage –Frequency Response
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Opamp topologies can be configured to process
fully differential signals
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Provides improved immunity to noise from commonmode perturbations such as power supply noise
Increases effective signal swing by a factor of two
Carries additional complexity for CMFB and increased power
consumption
Integrated opamps are often custom designed for a given
application
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Each application places different demands on DC gain, bandwidth,
signal swing, etc.
Opamp topologies considered today include telescopic, folded
cascode, and modified two stage (cascoded input/output)
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Admin
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Each carries different tradeoffs on the above specifications
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More Advanced Techniques (Extras)
HW 2 and HW 3
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Due Sunday
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Gain boosting technique
Nested Miller technique
HW 4 posted Sunday
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Characterize and design an opamp
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Gain Boosting of Current Sources
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We can achieve increased output impedance of
a current source with an amplifier
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A Simple Gain Boosting Amplifier
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The amplifier essentially increases gm1 by factor K:
Key issue: what is a convenient implementation of the above
circuit?
Penn ESE 568 Fall 2018 - Khanna
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Folded Cascode Gain Boosting Amplifier
Issue: current source requires significant headroom
due to the fact that Vds2 = Vgs4
Penn ESE 568 Fall 2018 - Khanna
Folded cascode yields
Leverage fully differential nature of current
sources within the opamp
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Improved headroom and higher gain!
Penn ESE 568 Fall 2018 - Khanna
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Penn ESE 568 Fall 2018 - Khanna
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We can apply this to the overall folded cascode
opamp
Penn ESE 568 Fall 2018 - Khanna
PMOS gain devices are now part of a differential pair
Need CMFB to set common-mode gate voltages of M1
and M2 (I.e. to set Vbias0)
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Folded Cascode with Gain Boosting
Symbolic View of Folded Cascode Gain Boosting Amp
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Differential Version of Gain Boosting Amp
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Common source amplifier utilized
Pro: Gain boosting provides substantial increase of
DC gain while maintaining good input and output swing
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Gain is on the order of (gmro)4
Con: very complex!
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Nested Miller Compensation
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Nested Miller Example
Advantage: increased DC gain with high input and
output swing
Issue: more parasitic poles to deal with
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Leads to lower unity gain bandwidth for
reasonable phase margin
Penn ESE 568 Fall 2018 - Khanna
Intermediate gain stages must be non-inverting in order
to achieve stable feedback
Compensation resistors should also be included to eliminate
the impact of RHP zeros
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Not shown for simplicity
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