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1997 Microchip Technology Inc. December 1997 /DS33023A
PICmicro™
Mid-Range MCU Family
Reference Manual

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December 1997 /DS33023A 1997 Microchip Technology Inc.
Internationally Recognized Quality
System Certifications
Microchip’s Quality System embodies the requirements
of ISO9001:1994. Our Microchip Chandler and Tempe
Design and Manufacturing facilities have been certified
to ISO 9001. The Microchip Kaohsiung Test facility, and
primary Assembly houses have been certified to ISO
9002. ISO certification plans are in-process for an esti-
mated certification grant by year-end 1997. In addition,
Microchip has received numerous customer certifica-
tions, including a Delco issued certificate of compliance
to AEC-A100/QS9000.
Microchip received ISO 9001 Quality System certifica-
tion for its worldwide headquarters, design, and wafer
fabrication facilities in January, 1997. Our field-pro-
grammable PICmicro™ 8-bit MCUs, Serial EEPROMs,
related specialty memory products and development
systems conform to the stringent quality standards of
the International Standard Organization (ISO).
“All rights reserved. Copyright © 1997, Microchip Technology
Incorporated, USA. Information contained in this publication
regarding device applications and the like is intended through
suggestion only and may be superseded by updates. No rep-
resentation or warranty is given and no liability is assumed by
Microchip Technology Incorporated with respect to the accu-
racy or use of such information, or infringement of patents or
other intellectual property rights arising from such use or oth-
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Microchip Technology Inc. in the U.S.A. and other countries.
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The Microchip name, logo, PIC, K EE L OQ , PICMASTER,
PICSTART, PRO MATE, and SEEVAL are registered
trademarks of Microchip Technology Incorporated in the
U.S.A.
MPLAB, PICmicro, ICSP and In-Circuit Serial Programming
are trademarks of Microchip Technology Incorporated.
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All other trademarks mentioned herein are property of their
respective companies.

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SECTION 1. INTRODUCTION 1-1
Introduction .......................................................................................................................................................1-2
Manual Objective ..............................................................................................................................................1-3
Device Structure ...............................................................................................................................................1-4
Development Support .......................................................................................................................................1-6
Device Varieties ...............................................................................................................................................1-7
Style and Symbol Conventions ......................................................................................................................1-12
Related Documents ........................................................................................................................................1-14
Related Application Notes ..............................................................................................................................1-17
Revision History .............................................................................................................................................1-18
SECTION 2. OSCILLATOR 2-1
Introduction .......................................................................................................................................................2-2
Oscillator Configurations ..................................................................................................................................2-2
Crystal Oscillators / Ceramic Resonators .........................................................................................................2-4
External RC Oscillator ....................................................................................................................................2-12
Internal 4 MHz RC Oscillator ..........................................................................................................................2-13
Effects of Sleep Mode on the On-chip Oscillator ............................................................................................2-17
Effects of Device Reset on the On-chip Oscillator .........................................................................................2-17
Design Tips ....................................................................................................................................................2-18
Related Application Notes ..............................................................................................................................2-19
Revision History .............................................................................................................................................2-20
SECTION 3. RESET 3-1
Introduction .......................................................................................................................................................3-2
Power-on Reset (POR), Power-up Timer (PWRT),
Oscillator Start-up Timer (OST), Brown-out Reset (BOR), and Parity Error Reset (PER) ..............................3-4
Registers and Status Bit Values .....................................................................................................................3-10
Design Tips ....................................................................................................................................................3-16
Related Application Notes ..............................................................................................................................3-17
Revision History .............................................................................................................................................3-18
SECTION 4. ARCHITECTURE 4-1
Introduction .......................................................................................................................................................4-2
Clocking Scheme/Instruction Cycle ..................................................................................................................4-5
Instruction Flow/Pipelining ................................................................................................................................4-6
I/O Descriptions ................................................................................................................................................4-7
Design Tips ....................................................................................................................................................4-12
Related Application Notes ..............................................................................................................................4-13
Revision History .............................................................................................................................................4-14
Table of Contents

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SECTION 5. CPU AND ALU 5-1
Introduction .......................................................................................................................................................5-2
General Instruction Format ...............................................................................................................................5-4
Central Processing Unit (CPU) .........................................................................................................................5-4
Instruction Clock ...............................................................................................................................................5-4
Arithmetic Logical Unit (ALU) ...........................................................................................................................5-5
STATUS Register .............................................................................................................................................5-6
OPTION_REG Register ...................................................................................................................................5-8
PCON Register .................................................................................................................................................5-9
Design Tips ....................................................................................................................................................5-10
Related Application Notes ..............................................................................................................................5-11
Revision History .............................................................................................................................................5-12
SECTION 6. MEMORY ORGANIZATION 6-1
Introduction .......................................................................................................................................................6-2
Program Memory Organization ........................................................................................................................6-2
Data Memory Organization ..............................................................................................................................6-8
Initialization .....................................................................................................................................................6-14
Design Tips ....................................................................................................................................................6-16
Related Application Notes ..............................................................................................................................6-17
Revision History .............................................................................................................................................6-18
SECTION 7. DATA EEPROM 7-1
Introduction .......................................................................................................................................................7-2
Control Register ...............................................................................................................................................7-3
EEADR .............................................................................................................................................................7-4
EECON1 and EECON2 Registers ....................................................................................................................7-4
Reading the EEPROM Data Memory ...............................................................................................................7-5
Writing to the EEPROM Data Memory .............................................................................................................7-5
Write Verify .......................................................................................................................................................7-6
Protection Against Spurious Writes ..................................................................................................................7-7
Data EEPROM Operation During Code Protected Configuration ....................................................................7-7
Initialization .......................................................................................................................................................7-7
Design Tips ......................................................................................................................................................7-8
Related Application Notes ................................................................................................................................7-9
Revision History .............................................................................................................................................7-10
SECTION 8. INTERRUPTS 8-1
Introduction .......................................................................................................................................................8-2
Control Registers ..............................................................................................................................................8-5
Interrupt Latency ............................................................................................................................................8-10
INT and External Interrupts ............................................................................................................................8-10
Context Saving During Interrupts ...................................................................................................................8-11
Initialization .....................................................................................................................................................8-14
Design Tips ....................................................................................................................................................8-16
Related Application Notes ..............................................................................................................................8-17
Revision History .............................................................................................................................................8-18
Table of Contents

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SECTION 9. I/O PORTS 9-1
Introduction .......................................................................................................................................................9-2
PORTA and the TRISA Register ......................................................................................................................9-4
PORTB and the TRISB Register ......................................................................................................................9-6
PORTC and the TRISC Register ......................................................................................................................9-8
PORTD and the TRISD Register ......................................................................................................................9-9
PORTE and the TRISE Register ....................................................................................................................9-10
PORTF and the TRISF Register ....................................................................................................................9-11
PORTG and the TRISG Register ...................................................................................................................9-12
GPIO and the TRISGP Register .....................................................................................................................9-13
I/O Programming Considerations ...................................................................................................................9-14
Initialization .....................................................................................................................................................9-16
Design Tips ....................................................................................................................................................9-17
Related Application Notes ..............................................................................................................................9-19
Revision History .............................................................................................................................................9-20
SECTION 10. PARALLEL SLAVE PORT 10-1
Introduction .....................................................................................................................................................10-2
Control Register .............................................................................................................................................10-3
Operation ........................................................................................................................................................10-4
Operation in Sleep Mode ................................................................................................................................10-5
Effect of a Reset .............................................................................................................................................10-5
PSP Waveforms .............................................................................................................................................10-5
Design Tips ....................................................................................................................................................10-6
Related Application Notes ..............................................................................................................................10-7
Revision History .............................................................................................................................................10-8
Table of Contents